The present invention relates to a technology of fabricating a semiconductor device, and more particularly, to a method for forming active pillars of a vertical channel transistor.
Recently, a semiconductor memory device having 4F2 (F: minimum feature size) has been demanded as the size of a semiconductor device decreases, and thus a semiconductor device provided with a vertical channel transistor has been proposed. The vertical channel transistor is configured such that a surround type gate surrounding a periphery of an active pillar extending vertically on a substrate is formed and then a drain region and a source region are formed on upper end and lower end of the active pillar, respectively, around the gate, thereby forming vertically a channel.
FIG. 1 is a cross-sectional view of active pillars of a vertical channel transistor according to prior art.
According to a method for forming an active pillar of a vertical channel transistor according to the prior art, a hard mask pattern 101 is formed on a substrate 100 using a photolithography process and then the substrate 100 is etched using the hard mask pattern 101 as an etch barrier to form an active pillar 100A.
Here, a line width (or diameter) of the active pillar 100A has to be reduced according to the prior art according to design requirements. However, limitation exists on reducing the line width of the active pillar 100A due to a defined photolithography process.
Additionally, sidewalls of the active pillar 100A may be formed as vertical profiles. However, the sidewalls of the active pillar 100A may be formed to be inclined since by-product generated while the active pillar 100A is formed such as polymer may remain on surfaces of the hard mask pattern 101 and the active pillar 100A. This is because the by-product acts as an etch barrier. As aforementioned, when the sidewalls of the active pillar 100a are inclined, a process margin in a subsequent process such as a surround type gate forming process decreases, thereby increasing difficulties in the subsequent process.